| 1 | commit 3c4c0213c11d623cba7adbc28dde652694f2f758
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| 2 | Author: Michel Dänzer <michel.daenzer@amd.com>
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| 3 | Date: Fri Jun 29 17:57:03 2018 +0200
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| 4 |
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| 5 | glamor: Use GBM for BO allocation when possible
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| 6 |
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| 7 | Inspired by amdgpu. This avoids various issues due to a GEM handle
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| 8 | lifetime conflict between us and Mesa with current glamor.
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| 9 |
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| 10 | Bugzilla: https://bugs.freedesktop.org/105381
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| 11 | Tested-by: Konstantin Kharlamov <hi-angel@yandex.ru>
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| 12 | Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
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| 13 |
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| 14 | diff --git a/configure.ac b/configure.ac
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| 15 | index 11efdf0a..f5614749 100644
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| 16 | --- a/configure.ac
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| 17 | +++ b/configure.ac
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| 18 | @@ -138,12 +138,22 @@ if test "x$GLAMOR" != "xno"; then
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| 19 | [Have glamor_egl_destroy_textured_pixmap API])], [],
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| 20 | [#include "xorg-server.h"
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| 21 | #include "glamor.h"])
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| 22 | +
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| 23 | + AC_CHECK_DECL(glamor_finish,
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| 24 | + [AC_DEFINE(HAVE_GLAMOR_FINISH, 1,
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| 25 | + [Have glamor_finish API])],
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| 26 | + [PKG_CHECK_MODULES(LIBGL, [gl])],
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| 27 | + [#include "xorg-server.h"
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| 28 | + #include "glamor.h"])
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| 29 | fi
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| 30 |
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| 31 | if test "x$GLAMOR_XSERVER" != xyes; then
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| 32 | PKG_CHECK_MODULES(LIBGLAMOR, [glamor >= 0.6.0])
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| 33 | PKG_CHECK_MODULES(LIBGLAMOR_EGL, [glamor-egl])
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| 34 | fi
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| 35 | +
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| 36 | + PKG_CHECK_MODULES(GBM, [gbm >= 10.6])
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| 37 | +
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| 38 | AC_DEFINE(USE_GLAMOR, 1, [Enable glamor acceleration])
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| 39 | else
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| 40 | AC_MSG_RESULT([$GLAMOR])
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| 41 | diff --git a/src/Makefile.am b/src/Makefile.am
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| 42 | index ed1bfa9e..df4a95e4 100644
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| 43 | --- a/src/Makefile.am
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| 44 | +++ b/src/Makefile.am
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| 45 | @@ -62,8 +62,8 @@ radeon_drv_la_SOURCES = \
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| 46 | $(RADEON_KMS_SRCS)
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| 47 |
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| 48 | if GLAMOR
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| 49 | -AM_CFLAGS += @LIBGLAMOR_CFLAGS@
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| 50 | -radeon_drv_la_LIBADD += @LIBGLAMOR_LIBS@
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| 51 | +AM_CFLAGS += @LIBGLAMOR_CFLAGS@ @GBM_CFLAGS@
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| 52 | +radeon_drv_la_LIBADD += @LIBGLAMOR_LIBS@ @GBM_LIBS@
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| 53 | radeon_drv_la_SOURCES += \
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| 54 | radeon_glamor_wrappers.c \
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| 55 | radeon_glamor.c
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| 56 | diff --git a/src/drmmode_display.c b/src/drmmode_display.c
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| 57 | index c91f5bb2..2773ce67 100644
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| 58 | --- a/src/drmmode_display.c
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| 59 | +++ b/src/drmmode_display.c
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| 60 | @@ -142,8 +142,7 @@ static PixmapPtr drmmode_create_bo_pixmap(ScrnInfoPtr pScrn,
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| 61 | }
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| 62 |
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| 63 | if (!info->use_glamor ||
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| 64 | - radeon_glamor_create_textured_pixmap(pixmap,
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| 65 | - radeon_get_pixmap_private(pixmap)))
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| 66 | + radeon_glamor_create_textured_pixmap(pixmap, bo))
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| 67 | return pixmap;
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| 68 |
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| 69 | fail:
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| 70 | @@ -435,8 +434,14 @@ destroy_pixmap_for_fbcon(ScrnInfoPtr pScrn)
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| 71 | /* XXX: The current GPUVM support in the kernel doesn't allow removing
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| 72 | * the virtual address range for this BO, so we need to keep around
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| 73 | * the pixmap to avoid breaking glamor with GPUVM
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| 74 | + *
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| 75 | + * Similarly, need to keep around the pixmap with current glamor, to
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| 76 | + * avoid issues due to a GEM handle lifetime conflict between us and
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| 77 | + * Mesa
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| 78 | */
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| 79 | - if (info->use_glamor && info->ChipFamily >= CHIP_FAMILY_CAYMAN)
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| 80 | + if (info->use_glamor &&
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| 81 | + (info->ChipFamily >= CHIP_FAMILY_CAYMAN ||
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| 82 | + xorgGetVersion() >= XORG_VERSION_NUMERIC(1,19,99,1,0)))
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| 83 | return;
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| 84 |
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| 85 | if (info->fbcon_pixmap)
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| 86 | @@ -2277,21 +2282,23 @@ drmmode_xf86crtc_resize (ScrnInfoPtr scrn, int width, int height)
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| 87 |
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| 88 | scrn->displayWidth = pitch / cpp;
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| 89 |
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| 90 | + if (!info->use_glamor) {
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| 91 | #if X_BYTE_ORDER == X_BIG_ENDIAN
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| 92 | - switch (cpp) {
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| 93 | - case 4:
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| 94 | - tiling_flags |= RADEON_TILING_SWAP_32BIT;
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| 95 | - break;
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| 96 | - case 2:
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| 97 | - tiling_flags |= RADEON_TILING_SWAP_16BIT;
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| 98 | - break;
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| 99 | - }
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| 100 | - if (info->ChipFamily < CHIP_FAMILY_R600 &&
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| 101 | - info->r600_shadow_fb && tiling_flags)
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| 102 | - tiling_flags |= RADEON_TILING_SURFACE;
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| 103 | + switch (cpp) {
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| 104 | + case 4:
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| 105 | + tiling_flags |= RADEON_TILING_SWAP_32BIT;
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| 106 | + break;
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| 107 | + case 2:
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| 108 | + tiling_flags |= RADEON_TILING_SWAP_16BIT;
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| 109 | + break;
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| 110 | + }
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| 111 | + if (info->ChipFamily < CHIP_FAMILY_R600 &&
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| 112 | + info->r600_shadow_fb && tiling_flags)
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| 113 | + tiling_flags |= RADEON_TILING_SURFACE;
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| 114 | #endif
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| 115 | - if (tiling_flags)
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| 116 | - radeon_bo_set_tiling(info->front_buffer->bo.radeon, tiling_flags, pitch);
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| 117 | + if (tiling_flags)
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| 118 | + radeon_bo_set_tiling(info->front_buffer->bo.radeon, tiling_flags, pitch);
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| 119 | + }
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| 120 |
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| 121 | if (!info->r600_shadow_fb) {
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| 122 | if (info->surf_man && !info->use_glamor)
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| 123 | diff --git a/src/radeon.h b/src/radeon.h
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| 124 | index 648fd98a..2bcfa41b 100644
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| 125 | --- a/src/radeon.h
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| 126 | +++ b/src/radeon.h
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| 127 | @@ -606,6 +606,8 @@ typedef struct {
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| 128 | unsigned hwcursor_disabled;
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| 129 |
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| 130 | #ifdef USE_GLAMOR
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| 131 | + struct gbm_device *gbm;
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| 132 | +
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| 133 | struct {
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| 134 | CreateGCProcPtr SavedCreateGC;
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| 135 | RegionPtr (*SavedCopyArea)(DrawablePtr, DrawablePtr, GCPtr, int, int,
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| 136 | @@ -744,8 +746,6 @@ static inline Bool radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_buffer *bo
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| 137 | }
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| 138 |
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| 139 | if (bo) {
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| 140 | - uint32_t pitch;
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| 141 | -
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| 142 | if (!priv) {
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| 143 | priv = calloc(1, sizeof (struct radeon_pixmap));
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| 144 | if (!priv)
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| 145 | @@ -754,11 +754,10 @@ static inline Bool radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_buffer *bo
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| 146 |
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| 147 | radeon_buffer_ref(bo);
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| 148 | priv->bo = bo;
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| 149 | -
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| 150 | - radeon_bo_get_tiling(bo->bo.radeon, &priv->tiling_flags, &pitch);
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| 151 | }
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| 152 |
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| 153 | radeon_set_pixmap_private(pPix, priv);
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| 154 | + radeon_get_pixmap_tiling_flags(pPix);
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| 155 | return TRUE;
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| 156 | } else
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| 157 | #endif /* USE_GLAMOR */
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| 158 | diff --git a/src/radeon_bo_helper.c b/src/radeon_bo_helper.c
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| 159 | index 2b836bbf..79e8ff1b 100644
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| 160 | --- a/src/radeon_bo_helper.c
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| 161 | +++ b/src/radeon_bo_helper.c
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| 162 | @@ -28,6 +28,37 @@
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| 163 | #include "radeon_glamor.h"
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| 164 | #include "radeon_bo_gem.h"
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| 165 |
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| 166 | +
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| 167 | +#ifdef USE_GLAMOR
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| 168 | +
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| 169 | +static uint32_t
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| 170 | +radeon_get_gbm_format(int depth, int bitsPerPixel)
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| 171 | +{
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| 172 | + switch (depth) {
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| 173 | +#ifdef GBM_FORMAT_R8
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| 174 | + case 8:
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| 175 | + return GBM_FORMAT_R8;
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| 176 | +#endif
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| 177 | + case 16:
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| 178 | + return GBM_FORMAT_RGB565;
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| 179 | + case 32:
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| 180 | + return GBM_FORMAT_ARGB8888;
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| 181 | + case 30:
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| 182 | + return GBM_FORMAT_XRGB2101010;
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| 183 | + case 24:
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| 184 | + if (bitsPerPixel == 32)
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| 185 | + return GBM_FORMAT_XRGB8888;
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| 186 | + /* fall through */
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| 187 | + default:
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| 188 | + ErrorF("%s: Unsupported depth/bpp %d/%d\n", __func__, depth,
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| 189 | + bitsPerPixel);
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| 190 | + return ~0U;
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| 191 | + }
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| 192 | +}
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| 193 | +
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| 194 | +#endif /* USE_GLAMOR */
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| 195 | +
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| 196 | +
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| 197 | static const unsigned MicroBlockTable[5][3][2] = {
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| 198 | /*linear tiled square-tiled */
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| 199 | {{32, 1}, {8, 4}, {0, 0}}, /* 8 bits per pixel */
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| 200 | @@ -158,6 +189,46 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
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| 201 | struct radeon_surface surface;
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| 202 | struct radeon_buffer *bo;
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| 203 | int domain = RADEON_GEM_DOMAIN_VRAM;
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| 204 | +
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| 205 | +#ifdef USE_GLAMOR
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| 206 | + if (info->use_glamor &&
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| 207 | + !(usage_hint == CREATE_PIXMAP_USAGE_BACKING_PIXMAP &&
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| 208 | + info->shadow_primary)) {
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| 209 | + uint32_t bo_use = GBM_BO_USE_RENDERING;
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| 210 | + uint32_t gbm_format = radeon_get_gbm_format(depth, bitsPerPixel);
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| 211 | +
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| 212 | + if (gbm_format == ~0U)
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| 213 | + return NULL;
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| 214 | +
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| 215 | + bo = calloc(1, sizeof(struct radeon_buffer));
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| 216 | + if (!bo)
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| 217 | + return NULL;
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| 218 | +
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| 219 | + bo->ref_count = 1;
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| 220 | +
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| 221 | + if (bitsPerPixel == pScrn->bitsPerPixel)
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| 222 | + bo_use |= GBM_BO_USE_SCANOUT;
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| 223 | +
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| 224 | + if ((usage_hint == CREATE_PIXMAP_USAGE_BACKING_PIXMAP &&
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| 225 | + info->shadow_primary) ||
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| 226 | + (usage_hint & 0xffff) == CREATE_PIXMAP_USAGE_SHARED)
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| 227 | + bo_use |= GBM_BO_USE_LINEAR;
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| 228 | +
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| 229 | + bo->bo.gbm = gbm_bo_create(info->gbm, width, height, gbm_format, bo_use);
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| 230 | + if (!bo->bo.gbm) {
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| 231 | + free(bo);
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| 232 | + return NULL;
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| 233 | + }
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| 234 | +
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| 235 | + bo->flags |= RADEON_BO_FLAGS_GBM;
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| 236 | +
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| 237 | + if (new_pitch)
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| 238 | + *new_pitch = gbm_bo_get_stride(bo->bo.gbm);
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| 239 | +
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| 240 | + return bo;
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| 241 | + }
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| 242 | +#endif
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| 243 | +
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| 244 | if (usage_hint) {
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| 245 | if (info->allowColorTiling) {
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| 246 | if (usage_hint & RADEON_CREATE_PIXMAP_TILING_MACRO)
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| 247 | @@ -245,6 +316,13 @@ radeon_alloc_pixmap_bo(ScrnInfoPtr pScrn, int width, int height, int depth,
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| 248 | void
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| 249 | radeon_finish(ScrnInfoPtr scrn, struct radeon_buffer *bo)
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| 250 | {
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| 251 | + RADEONInfoPtr info = RADEONPTR(scrn);
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| 252 | +
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| 253 | + if (info->use_glamor) {
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| 254 | + radeon_glamor_finish(scrn);
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| 255 | + return;
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| 256 | + }
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| 257 | +
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| 258 | radeon_cs_flush_indirect(scrn);
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| 259 | radeon_bo_wait(bo->bo.radeon);
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| 260 | }
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| 261 | @@ -282,7 +360,7 @@ Bool radeon_get_pixmap_handle(PixmapPtr pixmap, uint32_t *handle)
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| 262 | RADEONInfoPtr info = RADEONPTR(scrn);
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| 263 | #endif
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| 264 |
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| 265 | - if (bo) {
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| 266 | + if (bo && !(bo->flags & RADEON_BO_FLAGS_GBM)) {
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| 267 | *handle = bo->bo.radeon->handle;
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| 268 | return TRUE;
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| 269 | }
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| 270 | @@ -380,6 +458,44 @@ Bool radeon_set_shared_pixmap_backing(PixmapPtr ppix, void *fd_handle,
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| 271 | if (!bo)
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| 272 | goto error;
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| 273 |
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| 274 | +#ifdef USE_GLAMOR
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| 275 | + if (info->use_glamor) {
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| 276 | + struct gbm_import_fd_data data;
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| 277 | + uint32_t bo_use = GBM_BO_USE_RENDERING;
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| 278 | +
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| 279 | + data.format = radeon_get_gbm_format(ppix->drawable.depth,
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| 280 | + ppix->drawable.bitsPerPixel);
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| 281 | + if (data.format == ~0U)
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| 282 | + goto error;
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| 283 | +
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| 284 | + bo->ref_count = 1;
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| 285 | +
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| 286 | + data.fd = ihandle;
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| 287 | + data.width = ppix->drawable.width;
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| 288 | + data.height = ppix->drawable.height;
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| 289 | + data.stride = ppix->devKind;
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| 290 | +
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| 291 | + if (ppix->drawable.bitsPerPixel == pScrn->bitsPerPixel)
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| 292 | + bo_use |= GBM_BO_USE_SCANOUT;
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| 293 | +
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| 294 | + bo->bo.gbm = gbm_bo_import(info->gbm, GBM_BO_IMPORT_FD, &data, bo_use);
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| 295 | + if (!bo->bo.gbm)
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| 296 | + goto error;
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| 297 | +
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| 298 | + bo->flags |= RADEON_BO_FLAGS_GBM;
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| 299 | +
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| 300 | + if (!radeon_glamor_create_textured_pixmap(ppix, bo)) {
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| 301 | + radeon_buffer_unref(&bo);
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| 302 | + return FALSE;
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| 303 | + }
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| 304 | +
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| 305 | + ret = radeon_set_pixmap_bo(ppix, bo);
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| 306 | + /* radeon_set_pixmap_bo increments ref_count if it succeeds */
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| 307 | + radeon_buffer_unref(&bo);
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| 308 | + return ret;
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| 309 | + }
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| 310 | +#endif
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| 311 | +
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| 312 | bo->bo.radeon = radeon_gem_bo_open_prime(info->bufmgr, ihandle, size);
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| 313 | if (!bo)
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| 314 | goto error;
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| 315 | diff --git a/src/radeon_bo_helper.h b/src/radeon_bo_helper.h
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| 316 | index 53af87c3..cc3d1d3b 100644
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| 317 | --- a/src/radeon_bo_helper.h
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| 318 | +++ b/src/radeon_bo_helper.h
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| 319 | @@ -23,13 +23,21 @@
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| 320 | #ifndef RADEON_BO_HELPER_H
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| 321 | #define RADEON_BO_HELPER_H 1
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| 322 |
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| 323 | +#ifdef USE_GLAMOR
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| 324 | +#include <gbm.h>
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| 325 | +#endif
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| 326 | +
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| 327 | #define RADEON_BO_FLAGS_GBM 0x1
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| 328 |
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| 329 | struct radeon_buffer {
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| 330 | union {
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| 331 | +#ifdef USE_GLAMOR
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| 332 | + struct gbm_bo *gbm;
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| 333 | +#endif
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| 334 | struct radeon_bo *radeon;
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| 335 | } bo;
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| 336 | uint32_t ref_count;
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| 337 | + uint32_t flags;
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| 338 | };
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| 339 |
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| 340 | extern struct radeon_buffer *
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| 341 | @@ -88,8 +96,16 @@ radeon_buffer_unref(struct radeon_buffer **buffer)
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| 342 | return;
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| 343 | }
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| 344 |
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| 345 | - radeon_bo_unmap(buf->bo.radeon);
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| 346 | - radeon_bo_unref(buf->bo.radeon);
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| 347 | +#ifdef USE_GLAMOR
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| 348 | + if (buf->flags & RADEON_BO_FLAGS_GBM) {
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| 349 | + gbm_bo_destroy(buf->bo.gbm);
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| 350 | + } else
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| 351 | +#endif
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| 352 | + {
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| 353 | + radeon_bo_unmap(buf->bo.radeon);
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| 354 | + radeon_bo_unref(buf->bo.radeon);
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| 355 | + }
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| 356 | +
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| 357 | free(buf);
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| 358 | *buffer = NULL;
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| 359 | }
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| 360 | diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c
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| 361 | index 584a1d9d..ab3db6c5 100644
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| 362 | --- a/src/radeon_dri2.c
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| 363 | +++ b/src/radeon_dri2.c
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| 364 | @@ -79,11 +79,12 @@ static DevPrivateKeyRec dri2_window_private_key_rec;
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| 365 | static Bool
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| 366 | radeon_get_flink_name(RADEONEntPtr pRADEONEnt, PixmapPtr pixmap, uint32_t *name)
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| 367 | {
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| 368 | - struct radeon_bo *bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
|
|---|
| 369 | + struct radeon_buffer *bo = radeon_get_pixmap_bo(pixmap);
|
|---|
| 370 | struct drm_gem_flink flink;
|
|---|
| 371 |
|
|---|
| 372 | - if (bo)
|
|---|
| 373 | - return radeon_gem_get_kernel_name(bo, name) == 0;
|
|---|
| 374 | + if (bo && !(bo->flags & RADEON_BO_FLAGS_GBM) &&
|
|---|
| 375 | + radeon_gem_get_kernel_name(bo->bo.radeon, name) == 0)
|
|---|
| 376 | + return TRUE;
|
|---|
| 377 |
|
|---|
| 378 | if (radeon_get_pixmap_handle(pixmap, &flink.handle)) {
|
|---|
| 379 | if (drmIoctl(pRADEONEnt->fd, DRM_IOCTL_GEM_FLINK, &flink) != 0)
|
|---|
| 380 | diff --git a/src/radeon_dri3.c b/src/radeon_dri3.c
|
|---|
| 381 | index b199c793..688e594e 100644
|
|---|
| 382 | --- a/src/radeon_dri3.c
|
|---|
| 383 | +++ b/src/radeon_dri3.c
|
|---|
| 384 | @@ -213,17 +213,16 @@ static int radeon_dri3_fd_from_pixmap(ScreenPtr screen,
|
|---|
| 385 | {
|
|---|
| 386 | struct radeon_bo *bo;
|
|---|
| 387 | int fd;
|
|---|
| 388 | -
|
|---|
| 389 | - bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
|
|---|
| 390 | - if (!bo) {
|
|---|
| 391 | #ifdef USE_GLAMOR
|
|---|
| 392 | - ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
|
|---|
| 393 | - RADEONInfoPtr info = RADEONPTR(scrn);
|
|---|
| 394 | + ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
|
|---|
| 395 | + RADEONInfoPtr info = RADEONPTR(scrn);
|
|---|
| 396 |
|
|---|
| 397 | - if (info->use_glamor)
|
|---|
| 398 | - return glamor_fd_from_pixmap(screen, pixmap, stride, size);
|
|---|
| 399 | + if (info->use_glamor)
|
|---|
| 400 | + return glamor_fd_from_pixmap(screen, pixmap, stride, size);
|
|---|
| 401 | #endif
|
|---|
| 402 |
|
|---|
| 403 | + bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
|
|---|
| 404 | + if (!bo) {
|
|---|
| 405 | exaMoveInPixmap(pixmap);
|
|---|
| 406 | bo = radeon_get_pixmap_bo(pixmap)->bo.radeon;
|
|---|
| 407 | if (!bo)
|
|---|
| 408 | diff --git a/src/radeon_glamor.c b/src/radeon_glamor.c
|
|---|
| 409 | index c1d96160..fa634947 100644
|
|---|
| 410 | --- a/src/radeon_glamor.c
|
|---|
| 411 | +++ b/src/radeon_glamor.c
|
|---|
| 412 | @@ -52,6 +52,7 @@ radeon_glamor_create_screen_resources(ScreenPtr screen)
|
|---|
| 413 | {
|
|---|
| 414 | ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
|
|---|
| 415 | RADEONInfoPtr info = RADEONPTR(scrn);
|
|---|
| 416 | + uint32_t handle;
|
|---|
| 417 |
|
|---|
| 418 | if (!info->use_glamor)
|
|---|
| 419 | return TRUE;
|
|---|
| 420 | @@ -61,8 +62,12 @@ radeon_glamor_create_screen_resources(ScreenPtr screen)
|
|---|
| 421 | return FALSE;
|
|---|
| 422 | #endif
|
|---|
| 423 |
|
|---|
| 424 | - if (!glamor_egl_create_textured_screen(screen,
|
|---|
| 425 | - info->front_buffer->bo.radeon->handle,
|
|---|
| 426 | + if (info->front_buffer->flags & RADEON_BO_FLAGS_GBM)
|
|---|
| 427 | + handle = gbm_bo_get_handle(info->front_buffer->bo.gbm).u32;
|
|---|
| 428 | + else
|
|---|
| 429 | + handle = info->front_buffer->bo.radeon->handle;
|
|---|
| 430 | +
|
|---|
| 431 | + if (!glamor_egl_create_textured_screen(screen, handle,
|
|---|
| 432 | scrn->displayWidth *
|
|---|
| 433 | info->pixel_bytes))
|
|---|
| 434 | return FALSE;
|
|---|
| 435 | @@ -136,6 +141,13 @@ radeon_glamor_pre_init(ScrnInfoPtr scrn)
|
|---|
| 436 | }
|
|---|
| 437 | #endif
|
|---|
| 438 |
|
|---|
| 439 | + info->gbm = gbm_create_device(pRADEONEnt->fd);
|
|---|
| 440 | + if (!info->gbm) {
|
|---|
| 441 | + xf86DrvMsg(scrn->scrnIndex, X_ERROR,
|
|---|
| 442 | + "gbm_create_device returned NULL\n");
|
|---|
| 443 | + return FALSE;
|
|---|
| 444 | + }
|
|---|
| 445 | +
|
|---|
| 446 | /* Load glamor module */
|
|---|
| 447 | if ((glamor_module = xf86LoadSubModule(scrn, GLAMOR_EGL_MODULE_NAME))) {
|
|---|
| 448 | version = xf86GetModuleVersion(glamor_module);
|
|---|
| 449 | @@ -164,10 +176,21 @@ radeon_glamor_pre_init(ScrnInfoPtr scrn)
|
|---|
| 450 | }
|
|---|
| 451 |
|
|---|
| 452 | Bool
|
|---|
| 453 | -radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_pixmap *priv)
|
|---|
| 454 | +radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_buffer *bo)
|
|---|
| 455 | {
|
|---|
| 456 | - return glamor_egl_create_textured_pixmap(pixmap, priv->bo->bo.radeon->handle,
|
|---|
| 457 | - pixmap->devKind);
|
|---|
| 458 | + ScrnInfoPtr scrn = xf86ScreenToScrn(pixmap->drawable.pScreen);
|
|---|
| 459 | + RADEONInfoPtr info = RADEONPTR(scrn);
|
|---|
| 460 | + uint32_t handle;
|
|---|
| 461 | +
|
|---|
| 462 | + if (!info->use_glamor)
|
|---|
| 463 | + return TRUE;
|
|---|
| 464 | +
|
|---|
| 465 | + if (bo->flags & RADEON_BO_FLAGS_GBM)
|
|---|
| 466 | + handle = gbm_bo_get_handle(bo->bo.gbm).u32;
|
|---|
| 467 | + else
|
|---|
| 468 | + handle = bo->bo.radeon->handle;
|
|---|
| 469 | +
|
|---|
| 470 | + return glamor_egl_create_textured_pixmap(pixmap, handle, pixmap->devKind);
|
|---|
| 471 | }
|
|---|
| 472 |
|
|---|
| 473 | static Bool radeon_glamor_destroy_pixmap(PixmapPtr pixmap)
|
|---|
| 474 | @@ -179,13 +202,6 @@ static Bool radeon_glamor_destroy_pixmap(PixmapPtr pixmap)
|
|---|
| 475 | #endif
|
|---|
| 476 |
|
|---|
| 477 | if (pixmap->refcnt == 1) {
|
|---|
| 478 | - if (pixmap->devPrivate.ptr) {
|
|---|
| 479 | - struct radeon_buffer *bo = radeon_get_pixmap_bo(pixmap);
|
|---|
| 480 | -
|
|---|
| 481 | - if (bo)
|
|---|
| 482 | - radeon_bo_unmap(bo->bo.radeon);
|
|---|
| 483 | - }
|
|---|
| 484 | -
|
|---|
| 485 | #ifdef HAVE_GLAMOR_EGL_DESTROY_TEXTURED_PIXMAP
|
|---|
| 486 | glamor_egl_destroy_textured_pixmap(pixmap);
|
|---|
| 487 | #endif
|
|---|
| 488 | @@ -259,7 +275,7 @@ radeon_glamor_create_pixmap(ScreenPtr screen, int w, int h, int depth,
|
|---|
| 489 |
|
|---|
| 490 | screen->ModifyPixmapHeader(pixmap, w, h, 0, 0, stride, NULL);
|
|---|
| 491 |
|
|---|
| 492 | - if (!radeon_glamor_create_textured_pixmap(pixmap, priv))
|
|---|
| 493 | + if (!radeon_glamor_create_textured_pixmap(pixmap, priv->bo))
|
|---|
| 494 | goto fallback_glamor;
|
|---|
| 495 |
|
|---|
| 496 | pixmap->devPrivate.ptr = NULL;
|
|---|
| 497 | @@ -390,13 +406,12 @@ radeon_glamor_set_shared_pixmap_backing(PixmapPtr pixmap, void *handle)
|
|---|
| 498 | {
|
|---|
| 499 | ScreenPtr screen = pixmap->drawable.pScreen;
|
|---|
| 500 | ScrnInfoPtr scrn = xf86ScreenToScrn(screen);
|
|---|
| 501 | - struct radeon_pixmap *priv;
|
|---|
| 502 |
|
|---|
| 503 | if (!radeon_set_shared_pixmap_backing(pixmap, handle, NULL))
|
|---|
| 504 | return FALSE;
|
|---|
| 505 |
|
|---|
| 506 | - priv = radeon_get_pixmap_private(pixmap);
|
|---|
| 507 | - if (!radeon_glamor_create_textured_pixmap(pixmap, priv)) {
|
|---|
| 508 | + if (!radeon_glamor_create_textured_pixmap(pixmap,
|
|---|
| 509 | + radeon_get_pixmap_bo(pixmap))) {
|
|---|
| 510 | xf86DrvMsg(scrn->scrnIndex, X_ERROR,
|
|---|
| 511 | "Failed to get PRIME drawable for glamor pixmap.\n");
|
|---|
| 512 | return FALSE;
|
|---|
| 513 | diff --git a/src/radeon_glamor.h b/src/radeon_glamor.h
|
|---|
| 514 | index ec42df1f..2740ab33 100644
|
|---|
| 515 | --- a/src/radeon_glamor.h
|
|---|
| 516 | +++ b/src/radeon_glamor.h
|
|---|
| 517 | @@ -33,6 +33,12 @@ struct radeon_pixmap;
|
|---|
| 518 |
|
|---|
| 519 | #ifdef USE_GLAMOR
|
|---|
| 520 |
|
|---|
| 521 | +#ifndef HAVE_GLAMOR_FINISH
|
|---|
| 522 | +#include <GL/gl.h>
|
|---|
| 523 | +#endif
|
|---|
| 524 | +
|
|---|
| 525 | +#include <gbm.h>
|
|---|
| 526 | +
|
|---|
| 527 | #define GLAMOR_FOR_XORG 1
|
|---|
| 528 | #include <glamor.h>
|
|---|
| 529 |
|
|---|
| 530 | @@ -65,12 +71,27 @@ void radeon_glamor_screen_init(ScreenPtr screen);
|
|---|
| 531 | Bool radeon_glamor_create_screen_resources(ScreenPtr screen);
|
|---|
| 532 | void radeon_glamor_free_screen(int scrnIndex, int flags);
|
|---|
| 533 |
|
|---|
| 534 | -Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_pixmap *priv);
|
|---|
| 535 | +Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_buffer *bo);
|
|---|
| 536 | void radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst);
|
|---|
| 537 | PixmapPtr radeon_glamor_set_pixmap_bo(DrawablePtr drawable, PixmapPtr pixmap);
|
|---|
| 538 |
|
|---|
| 539 | XF86VideoAdaptorPtr radeon_glamor_xv_init(ScreenPtr pScreen, int num_adapt);
|
|---|
| 540 |
|
|---|
| 541 | +static inline void
|
|---|
| 542 | +radeon_glamor_finish(ScrnInfoPtr scrn)
|
|---|
| 543 | +{
|
|---|
| 544 | + RADEONInfoPtr info = RADEONPTR(scrn);
|
|---|
| 545 | +
|
|---|
| 546 | +#if HAVE_GLAMOR_FINISH
|
|---|
| 547 | + glamor_finish(scrn->pScreen);
|
|---|
| 548 | +#else
|
|---|
| 549 | + glamor_block_handler(scrn);
|
|---|
| 550 | + glFinish();
|
|---|
| 551 | +#endif
|
|---|
| 552 | +
|
|---|
| 553 | + info->gpu_flushed++;
|
|---|
| 554 | +}
|
|---|
| 555 | +
|
|---|
| 556 | #else
|
|---|
| 557 |
|
|---|
| 558 | static inline Bool radeon_glamor_pre_init(ScrnInfoPtr scrn) { return FALSE; }
|
|---|
| 559 | @@ -79,7 +100,7 @@ static inline void radeon_glamor_fini(ScreenPtr screen) { }
|
|---|
| 560 | static inline Bool radeon_glamor_create_screen_resources(ScreenPtr screen) { return FALSE; }
|
|---|
| 561 | static inline void radeon_glamor_free_screen(int scrnIndex, int flags) { }
|
|---|
| 562 |
|
|---|
| 563 | -static inline Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_pixmap *priv) { return TRUE; }
|
|---|
| 564 | +static inline Bool radeon_glamor_create_textured_pixmap(PixmapPtr pixmap, struct radeon_buffer *bo) { return TRUE; }
|
|---|
| 565 |
|
|---|
| 566 | static inline void radeon_glamor_exchange_buffers(PixmapPtr src, PixmapPtr dst) {}
|
|---|
| 567 | static inline PixmapPtr radeon_glamor_set_pixmap_bo(DrawablePtr drawable, PixmapPtr pixmap) { return pixmap; }
|
|---|
| 568 | @@ -87,6 +108,9 @@ static inline PixmapPtr radeon_glamor_set_pixmap_bo(DrawablePtr drawable, Pixmap
|
|---|
| 569 | static inline struct radeon_pixmap *radeon_get_pixmap_private(PixmapPtr pixmap) { return NULL; }
|
|---|
| 570 |
|
|---|
| 571 | static inline XF86VideoAdaptorPtr radeon_glamor_xv_init(ScreenPtr pScreen, int num_adapt) { return NULL; }
|
|---|
| 572 | +
|
|---|
| 573 | +static inline void radeon_glamor_finish(ScrnInfoPtr pScrn) { }
|
|---|
| 574 | +
|
|---|
| 575 | #endif
|
|---|
| 576 |
|
|---|
| 577 | #endif /* RADEON_GLAMOR_H */
|
|---|
| 578 | diff --git a/src/radeon_kms.c b/src/radeon_kms.c
|
|---|
| 579 | index d3eeebea..72e60831 100644
|
|---|
| 580 | --- a/src/radeon_kms.c
|
|---|
| 581 | +++ b/src/radeon_kms.c
|
|---|
| 582 | @@ -212,6 +212,11 @@ static void RADEONFreeRec(ScrnInfoPtr pScrn)
|
|---|
| 583 | info->accel_state = NULL;
|
|---|
| 584 | }
|
|---|
| 585 |
|
|---|
| 586 | +#ifdef USE_GLAMOR
|
|---|
| 587 | + if (info->gbm)
|
|---|
| 588 | + gbm_device_destroy(info->gbm);
|
|---|
| 589 | +#endif
|
|---|
| 590 | +
|
|---|
| 591 | pEnt = info->pEnt;
|
|---|
| 592 | free(pScrn->driverPrivate);
|
|---|
| 593 | pScrn->driverPrivate = NULL;
|
|---|
| 594 | @@ -2269,7 +2274,11 @@ Bool RADEONScreenInit_KMS(ScreenPtr pScreen, int argc, char **argv)
|
|---|
| 595 | xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "radeon_setup_kernel_mem failed\n");
|
|---|
| 596 | return FALSE;
|
|---|
| 597 | }
|
|---|
| 598 | - front_ptr = info->front_buffer->bo.radeon->ptr;
|
|---|
| 599 | +
|
|---|
| 600 | + if (!(info->front_buffer->flags & RADEON_BO_FLAGS_GBM))
|
|---|
| 601 | + front_ptr = info->front_buffer->bo.radeon->ptr;
|
|---|
| 602 | + else
|
|---|
| 603 | + front_ptr = NULL;
|
|---|
| 604 |
|
|---|
| 605 | if (info->r600_shadow_fb) {
|
|---|
| 606 | info->fb_shadow = calloc(1,
|
|---|
| 607 | @@ -2739,21 +2748,24 @@ static Bool radeon_setup_kernel_mem(ScreenPtr pScreen)
|
|---|
| 608 | ErrorF("Failed to map cursor buffer memory\n");
|
|---|
| 609 | }
|
|---|
| 610 | }
|
|---|
| 611 | +
|
|---|
| 612 | + if (!info->use_glamor) {
|
|---|
| 613 | #if X_BYTE_ORDER == X_BIG_ENDIAN
|
|---|
| 614 | - switch (cpp) {
|
|---|
| 615 | - case 4:
|
|---|
| 616 | - tiling_flags |= RADEON_TILING_SWAP_32BIT;
|
|---|
| 617 | - break;
|
|---|
| 618 | - case 2:
|
|---|
| 619 | - tiling_flags |= RADEON_TILING_SWAP_16BIT;
|
|---|
| 620 | - break;
|
|---|
| 621 | - }
|
|---|
| 622 | - if (info->ChipFamily < CHIP_FAMILY_R600 &&
|
|---|
| 623 | - info->r600_shadow_fb && tiling_flags)
|
|---|
| 624 | - tiling_flags |= RADEON_TILING_SURFACE;
|
|---|
| 625 | + switch (cpp) {
|
|---|
| 626 | + case 4:
|
|---|
| 627 | + tiling_flags |= RADEON_TILING_SWAP_32BIT;
|
|---|
| 628 | + break;
|
|---|
| 629 | + case 2:
|
|---|
| 630 | + tiling_flags |= RADEON_TILING_SWAP_16BIT;
|
|---|
| 631 | + break;
|
|---|
| 632 | + }
|
|---|
| 633 | + if (info->ChipFamily < CHIP_FAMILY_R600 &&
|
|---|
| 634 | + info->r600_shadow_fb && tiling_flags)
|
|---|
| 635 | + tiling_flags |= RADEON_TILING_SURFACE;
|
|---|
| 636 | #endif
|
|---|
| 637 | - if (tiling_flags)
|
|---|
| 638 | - radeon_bo_set_tiling(info->front_buffer->bo.radeon, tiling_flags, pitch);
|
|---|
| 639 | + if (tiling_flags)
|
|---|
| 640 | + radeon_bo_set_tiling(info->front_buffer->bo.radeon, tiling_flags, pitch);
|
|---|
| 641 | + }
|
|---|
| 642 | }
|
|---|
| 643 |
|
|---|
| 644 | pScrn->displayWidth = pitch / cpp;
|
|---|
| 645 | commit 499d2f9d5d301ef1efd4ffc2952677609ef05122
|
|---|
| 646 | Author: Michel Dänzer <michel.daenzer@amd.com>
|
|---|
| 647 | Date: Tue Jul 17 11:43:12 2018 +0200
|
|---|
| 648 |
|
|---|
| 649 | glamor: Invalidate cached GEM handle in radeon_set_pixmap_bo
|
|---|
| 650 |
|
|---|
| 651 | We continued using the stale cached handle, causing issues e.g. when
|
|---|
| 652 | resizing the screen via RandR.
|
|---|
| 653 |
|
|---|
| 654 | Reported-by: iive on IRC
|
|---|
| 655 | Acked-by: Alex Deucher <alexander.deucher@amd.com>
|
|---|
| 656 |
|
|---|
| 657 | diff --git a/src/radeon.h b/src/radeon.h
|
|---|
| 658 | index 450c69aa..1a1edb1b 100644
|
|---|
| 659 | --- a/src/radeon.h
|
|---|
| 660 | +++ b/src/radeon.h
|
|---|
| 661 | @@ -735,6 +735,7 @@ static inline Bool radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_buffer *bo
|
|---|
| 662 | return TRUE;
|
|---|
| 663 |
|
|---|
| 664 | radeon_buffer_unref(&priv->bo);
|
|---|
| 665 | + priv->handle_valid = FALSE;
|
|---|
| 666 | }
|
|---|
| 667 |
|
|---|
| 668 | drmmode_fb_reference(pRADEONEnt->fd, &priv->fb, NULL);
|
|---|