Opened 11 years ago
Closed 11 years ago
#6485 closed enhancement (fixed)
mesa-10.5.5
| Reported by: | Fernando de Oliveira | Owned by: | Fernando de Oliveira |
|---|---|---|---|
| Priority: | normal | Milestone: | 7.8 |
| Component: | BOOK | Version: | SVN |
| Severity: | medium | Keywords: | |
| Cc: |
Description
ftp://ftp.freedesktop.org/pub/mesa/10.5.5/mesa-10.5.5.tar.xz
ftp://ftp.freedesktop.org/pub/mesa/10.5.5/mesa-10.5.5.tar.xz.sig
SHA256 4ac4e4ea3414f1cadb1467f2f173f9e56170d31e8674f7953a46f0549d319f28
http://www.mesa3d.org/relnotes/10.5.5.html
New features
None
Bug fixes
This list is likely incomplete.
• Bug 88521 - GLBenchmark 2.7 TRex renders with artifacts on Gen8 with !UXA
• Bug 89455 - [NVC0/Gallium] Unigine Heaven black and white boxes
• Bug 89689 - [Regression] Weston on DRM backend won't start with new
version of mesa
• Bug 90130 - gl_PrimitiveId seems to reset at 340
Changes
• i965: Add XRGB8888 format to intel_screen_make_configs
• docs: Add sha256 sums for the 10.5.4 release
• r300: do not link against libdrm_intel
• Update version to 10.5.5
• nvc0/ir: flush denorms to zero in non-compute shaders
• gk110/ir: fix set with a register dest to not auto-set the abs flag
• nvc0/ir: fix predicated PFETCH emission
• nv50/ir: fix asFlow() const helper for OP_JOIN
• i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
• i965: Disallow linear blits that are not cacheline aligned.
• draw: fix prim ids when there's no gs
Change History (4)
comment:1 by , 11 years ago
| Owner: | changed from to |
|---|---|
| Status: | new → assigned |
comment:2 by , 11 years ago
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I've rolled the patch forward for you (didn't see that you'd taken this - I don't think I get on with current trac!). With current svn, no need for autoreconf.