mesa-22.2.0

[Bruce Dubbs]

New minor version.

[Xi Ruoyao]

We need to disable Vulkan drivers with -Dvulkan-drivers="" or glslangValidator will be required.

[Xi Ruoyao]

It builds fine with LLVM-15.

[rsholl]

Alyssa Rosenzweig (9):

• panfrost: Don't segfault on unknown models

• pan/bi: Don't reorder image loads across stores

• pan/bi: Don't allow ATEST to take a temporary

• pan/mdg: Print 3 sources for CSEL

• pan/bi: Fix dual texturing with uniforms

• pan/bi: Fix out-of-bounds write in va_lower_split_64bit

• pan/bi: Consider all dests in helper_block_update

• agx: Fix float copyprop of neg(neg) case

• panfrost: Respect buffer offset for OpenCL

Bas Nieuwenhuizen (3):

• vulkan/wsi: Take max extent into consideration for modifier selection.

• amd/common: Don't rely on DCN support checks with modifiers.

• amd/common: Disable DCC retile modifiers on RDNA1

Charmaine Lee (2):

• svga: support TGSI_SEMANTIC_TEXCOORD in swtnl draw context

• svga: fix invalid component access of domain location

Chia-I Wu (2):

• turnip: lower the queue priority to 1

• ir3: fix predicate splitting in scheduler

Connor Abbott (4):

• ir3/spill: Fix extracting from a vector at the end of a block

• tu/lrz: Fix multiple subpass case with secondaries

• tu/lrz: Fix multiple depth attachment case with secondaries

• tu: Don't preload variable-count descriptors

Danylo Piliaiev (3):

• tu: Disable LRZ write when alpha-to-coverage is enabled

• freedreno: Disable LRZ write when alpha-to-coverage is enabled

• ir3: Prevent reordering movmsk with kill

Dave Airlie (2):

• nir_to_tgsi_info: drop const_buffers_declared

• llvmpipe: finish rendering before flushing frontbuffer resources.

Dylan Baker (5):

• .pick_status.json: Update to 0c6fbfca0c91ef012e8ab767a317c07f1f6dc5e6

• .pick_status.json: Update to 8eac45b27446cd9b9eaeb147af97fff1e09832cb

• .pick_status.json: Update to baf24dea943202b3a92cad0c9f9648597040955a

• .pick_status.json: Update to 3d4c36a3bcc51ed441b2667d92291bea30ef7449

VERSION: update to 22.2.0

Emma Anholt (1):

• spirv: Mark phis as mediump instead of directly lowering them to 16 bit.

Eric Engestrom (3):

• wsi/x11: fix memleak in wsi_x11_connection_create()

• meson: replace manual compiler flags with meson arguments

• broadcom: fix dependencies in static_library() calls

Erik Faye-Lund (5):

• zink: type_main -> type_void_func

• zink: add spirv_builder_function_call

• zink: wrap discard in a function

• zink: clamp miplodbias when creating sampler

• docs/zink: document rgtc requirement

Georg Lehmann (1):

• aco: Force tex operand to have the correct sub dword size before packing.

Gert Wollny (16):

• r600/sfn: Schedule shift instruction on R600 in t-slot

• r600/sfn: Add GS thread fix just like the TGSI code path

• r600/sfn: Sort FS inputs to make interpolated values come first

• r600/sfn: Fix color outputs when color0 writes all

• r600: Force NOPs when loading AR on R600 class hardware

• r600/sfn: Handle R600 scratch read

• r600: Don't use SB with R600 style scratch reads

• r600/sfn: Handle color0 writes all on R700 like on EG

• r600/sfn: Don't tag mem-ring and stream instructions as exports

• r600/sfn: Don't schedule GDS instructions early

• r600/sfn: Don't scan the whole block for ready instructions

• r600/sfn: Use a heuristic to keep SSBO setup and store close

• r600: Fix reporting TGSI IR support

• r600/sfn: Use a low number for unused target register

• virgl: when reading back wait first, then do the transfer

• r600/sfn: override register ID when it doesn't matter

Glenn Kennard (1):

• nv30: Fix non-scissored clears after a scissor has been set

Ian Romanick (3):

• nir: spirv: Allow 32-bit version of nir_intrinsic_is_sparse_texels_resident

• radeonsi: r600: d3d12: st: Use NIR lowering for tg4 offset arrays instead of GLSL lowering

• glsl: Remove lower_offset_arrays pass

Ikshwaku Chauhan (1):

• Revert "radeon: add EFC support to only VCN2.0 devices"

Iván Briano (1):

• anv: pipelineStageCreationFeedbackCount is allowed to be 0

James Zhu (1):

• amd/common: some ASICs with gfx9 use compute rings for render

Jason Ekstrand (2):

• radv: Use both aspects for depth/stencil blit destinations

• vulkan: Dirty VP_VIEWPORTS/SCISSORS when copying viewports/scissors

Jesse Natalie (2):

• microsoft/compiler: Discard shouldn't be marked readnone

• microsoft/compiler: Fix PSV struct when numthreads is 0

Jordan Justen (7):

• iris: Drop extra file-descriptor dup in iris_drm_screen_create()

• intel/pci_ids: Update ADL-S strings

• intel/pci_ids: Add 0x468b ADL-S PCI-id

• intel/pci_ids: Update ATS-M device names

• intel/pci_ids: Update DG2 device names

• intel/pci_ids: Add dg2 0x5698 pci-id

• intel/pci_ids: Drop non-upstream dg2 pci-ids

Juan A. Suarez Romero (1):

• vc4: store tex sampler in proper register

Karol Herbst (4):

• nouveau: use the contexts pushbuf and client where possible

• nouveau/mm: make code thread safe

• nv50/ir: fix OP_UNION resolving when used for vector values

• nv50: properly flush the TSC cache on 3D

Kenneth Graunke (4):

• iris: Fix PIPE_CAP_UMA

• iris: Use linear for exported resources if we can't convey tiling

• iris: Delete unused iris_screen::aperture_bytes field

• crocus: Fix memory leaks on iris_resource_create failure paths

Lionel Landwerlin (6):

• anv: fix GetPipelineExecutableStatistics for ray tracing pipelines

• anv: fixup assertions on lowered storage formats

• anv: fix assert in memory budget code when extension is not supported

• intel/fs: fix load_scratch intrinsic

• intel/fs: fixup scratch load/store handling on Gfx12.5+

• intel/fs: fixup SEND validation check on overlapping src0/src1

Liviu Prodea (1):

• meson: Only draw with llvm depends on native directly Tests, softpipe or AMD drivers don't depend on it directly

Lucas Stach (3):

• etnaviv: move checking for MC2.0 for TS into screen init

• etnaviv: use linear PE rendering only on properly aligned surfaces

• etnaviv: add debug option to disable linear PE feature

Marcin Ślusarz (2):

• intel/compiler: fix mesh urb write regression

• anv: disable task redistribution

Marek Olšák (1):

• ac/surface: disallow 256KB swizzle modes on gfx11 APUs

Mark Collins (1):

• tu: Clamp priority in DRM submitqueue creation

Max Kellermann (2):

• gallium/u_threaded: add missing reference counts for draw_multi slots

• gallium/u_threaded: fix offset calculation for draw_multi slots

Mike Blumenkrantz (15):

• vk/render_pass: don't deref null resolve attachments

• zink: handle nir_intrinsic_sparse_residency_code_and mechanics

• zink: ignore nir_texop_lod for tex dest matching

• tu: fix invalid free on alloc failure

• zink: don't call util_queue_fence_init in zink_screen_get_pipeline_cache()

• zink: don't emit entrypoints for function temp variables

• zink: check the variable mode before taking samplemask path in ntv

• zink: explicitly use unsigned types for bit shifts

• zink: only add srgb mutable for images with modifiers

• zink: don't emit illegal interpolation

• llvmpipe: don't assume pipe_context is always available in flush_frontbuffer

• zink: flag all assigned output slots as mapped

• zink: handle split acquire/present

• st_pbo/compute: fix 1D_ARRAY offsets

• st_pbo/compute: fix 1D coord dimension by pre-trimming vectors

Pierre-Eric Pelloux-Prayer (4):

• radeonsi: prevent u_blitter recursion in si_update_ps_colorbuf0_slot

• radeonsi: use nir_opt_large_constants earlier

• mesa: avoid reading back textures from VRAM

• radeonsi: invalidate L2 when using dcc stores

Qiang Yu (2):

• radeonsi: fix tcs_out_lds_offsets arg alignment

• winsys/amdgpu: fix non-page-aligned sparse buffer creation

Rhys Perry (5):

• radv: remove claimed support for sRGB vertex buffer formats

• radv: fix 16-bit support in radv_lower_vs_input

• aco: fix 16-bit VS inputs

• aco: don't expand vec3 VS input load to vec4 on GFX6

• aco: add SCC clobber in build_cube_select

Riteo (1):

• vulkan/device_select_wayland: fix a memory leak with DRM device handling

Rob Clark (2):

• llvmpipe: Add some missing locking

• freedreno: We really don't need aligned vbo's

Roman Stratiienko (2):

• v3dv: Enable sync_fd importing/exporting on Android

• v3dv: Limit API version to v1.0 for Android

Samuel Pitoiset (3):

• radv: re-emit viewports if negative one to one or depth clamp mode changed

• radv: fix bogus assertion with RADV_FORCE_VRS

• radv: fix pipelineStageCreationFeedbackCount when it's 0

SoroushIMG (1):

• zink: Fix incorrect emission of SPIR-V shift ops

Sviatoslav Peleshko (1):

• iris: Always initialize shader compilation queue ready fence

Timothy Arceri (1):

• glsl: dont lower precision for textureGatherOffsets

Timur Kristóf (2):

• aco: Fix p_init_scratch for task shaders.

• nir/gather_info: Clear cross-invocation output mask.

Yiwei Zhang (6):

• venus: fix external memory ext filtering

• venus: avoid feedback for external fence

• venus: allow no external memory handle when renderers lacks support

• zink: fix zink_create_fence_fd to properly import

• zink: fix in-fence lifecycle

• venus: ignore pInheritanceInfo if not secondary command buffer

Yonggang Luo (1):

• c11: #include <threads.h> when the os/platform provide it

sjfricke (1):

• anv: fix assert to build with shader cache disabled

[Bruce Dubbs]

Fixed at commits

ee7740c844 Update to balsa-2.6.4.
f4b4c814e2 Update to mesa-22.2.0.
fb45bfdc2a Update to flac-1.4.1.
a05a6f33b7 Update to xapian-core-1.4.21.