Update x264 and x265 to new snapshots

[Douglas R. Reno]

Prior to releases, we have to update x264 and x265 with snapshots. This ticket is to do that for BLFS 12.2.

[Douglas R. Reno]

x264

commit 4613ac3c15fd75cebc4b9f65b7fb95e70a3acce1 (HEAD -> master, origin/master, origin/HEAD)
Author: Henrik Gramner <henrik@gramner.com>
Date:   Sun May 12 22:29:20 2024 +0200

    x86inc: Improve ELF PIC support for external function calls
    
    PLT/GOT indirections are required in some cases. Most commonly when
    calling functions from other shared libraries, but also in some
    scenarios when calling functions with default symbol visibility
    even within the same component on certain elf64 platforms.
    
    On elf64 we can simply use PLT relocations for all calls to external
    functions. Since the linker is able to eliminate unnecessary PLT
    indirections with the final output binary being identical to non-PLT
    relocations there isn't really any downside to doing so. This mimics
    what regular compilers normally do for calls to external functions.
    
    On elf32 with PIC we can use a function pointer from the GOT when
    calling external functions, similar to what regular compilers do when
    using -fno-plt. Since this both introduces overhead and clobbers one
    register, which could potentially have been used for custom calling
    conventions when calling other asm functions within the same library,
    it's only performed for functions declared using 'cextern_naked'.

commit 7ed753b10a61d0be95f683289dfb925b800b0676
Author: Xiwei Gu <guxiwei-hf@loongson.cn>
Date:   Tue Mar 5 14:35:43 2024 +0800

    loongarch: Enhance ultrafast encoding performance
    
    Using the following command, ultrafast encoding
    has improved from 182fps to 189fps:
    ./x264 --preset ultrafast -o out.mkv yuv_1920x1080.yuv
commit 162622863ad2db7f27e2b320d643ea238e61217c
Author: Xiwei Gu <guxiwei-hf@loongson.cn>
Date:   Mon Mar 11 09:35:24 2024 +0800

    loongarch: Fixed pixel_sa8d_16x16_lasx
    
    Save and restore FPR

commit 5a61afdbf169cf7bfe50dc2f0addfba8f12d8b7b
Author: Xiwei Gu <guxiwei-hf@loongson.cn>
Date:   Fri Mar 8 16:00:16 2024 +0800

    loongarch: Add checkasm_call

commit 982d32400f24e40573ac92d274d7d46eafdb9836
Author: Xiwei Gu <guxiwei-hf@loongson.cn>
Date:   Wed Mar 13 16:57:04 2024 +0800

    loongarch: Update loongson_asm.S version to 0.4.0

commit 585e01997f0c7e6d72c8ca466406d955c07de912
Author: Henrik Gramner <henrik@gramner.com>
Date:   Wed Mar 13 02:43:08 2024 +0100

    x86inc: Improve XMM-spilling functionality on 64-bit Windows
    
    Prior to this change dealing with the scenario where the number of
    XMM registers spilled depends on if a branch is taken or not was
    complicated to handle well. There was essentially three options:
    
    1) Always spill the largest number of XMM register. Results in
       unnecessary spills.
    
    2) Do the spilling after the branch. Results in code duplication
       for the shared subset of spills.
    
    3) Do the spilling manually. Optimal, but overly complex and vexing.
    
    This adds an additional optional argument to the WIN64_SPILL_XMM
    and WIN64_PUSH_XMM macros to make it possible to allocate space
    for a certain number of registers but initially only push a subset
    of those, with the option of pushing additional register later.
commit 4df71a75bf76531e0af929d76b1d064e2ce8b037
Author: Henrik Gramner <henrik@gramner.com>
Date:   Wed Mar 13 01:35:54 2024 +0100

    x86inc: Restore the stack state between stack allocations
    
    Allows the use of multiple independent stack allocations within
    a function without having to manually fiddle with stack offsets.

commit 3d8aff7e26b2a611d7158ccc875593d36b5f720c
Author: Henrik Gramner <henrik@gramner.com>
Date:   Thu Feb 22 12:54:30 2024 +0100

    x86inc: Fix warnings with old nasm versions

commit de1bea534ff74195d1205cb5d50dab815bb7bc23
Author: Anton Mitrofanov <BugMaster@narod.ru>
Date:   Tue Mar 12 23:10:12 2024 +0300

    ppc: Fix incompatible pointer type errors
    
    Use correct return type for pixel_sad_x3/x4 functions.
    Bug report by Dominik 'Rathann' Mierzejewski .

commit be4f0200ed007c466fd96185c39cde2a2d60ef50
Author: Martin Storsjö <martin@martin.st>
Date:   Sun Feb 25 02:07:33 2024 +0200

    aarch64: Use regular hwcaps flags instead of HWCAP_CPUID for CPU feature detection on Linux
    
    This makes the code much simpler (especially for adding support
    for other instruction set extensions), avoids needing inline
    assembly for this feature, and generally is more of the canonical
    way to do this.
    
    The CPU feature detection was added in
    9c3c71688226fbb23f4d36399fab08f018e760b0, using HWCAP_CPUID.
    
    The argument for using that, was that HWCAP_CPUID was added much
    earlier in the kernel (in Linux v4.11), while the HWCAP flags for
    individual features always come later. This allows detecting support
    for new CPU extensions before the kernel exposes information about
    them via hwcap flags.
    
    However in practice, there's probably quite little advantage in this.
    E.g. HWCAP_SVE was added in Linux v4.15, and HWCAP2_SVE2 was added in
    v5.10 - later than HWCAP_CPUID, but there's probably very little
    practical cases where one would run a kernel older than that on a CPU
    that supports those instructions.
    
    Additionally, we provide our own definitions of the flag values to
    check (as they are fixed constants anyway), with names not conflicting
    with the ones from system headers. This reduces the number of ifdefs
    needed, and allows detecting those features even if building with
    userland headers that are lacking the definitions of those flags.
    
    Also, slightly older versions of QEMU, e.g. 6.2 in Ubuntu 22.04,
    do expose support for these features via HWCAP flags, but the
    emulated cpuid registers are missing the bits for exposing e.g. SVE2
    (This issue is fixed in later versions of QEMU though.)
    
    Also drop the ifdef check for whether AT_HWCAP is defined; it was
    added to glibc in 1997. AT_HWCAP2 was added in 2013, in glibc 2.18,
    which also precedes when aarch64 was commonly used anyway, so
    don't guard the use of that with an ifdef.

commit 7241d020118bb09cc0ad119d7bc9f630a1caad10
Author: Anton Mitrofanov <BugMaster@narod.ru>
Date:   Sat Feb 24 23:29:18 2024 +0300

    CI: Switch 32/64-bit windows builds to LLVM
    
    Use same Docker images as VLC for contrib compilation.
Author: Anton Mitrofanov <BugMaster@narod.ru>
Date:   Sat Feb 24 22:41:11 2024 +0300

    CI: Add config.log to job artifacts

commit 12426f5f4906e34d483a07da0debb6d56c6f8434
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:51 2024 +0100

    x86inc: Add support for ELF CET properties
    
    Automatically flag x86-64 asm object files as SHSTK-compatible.
    
    Shadow Stack (SHSTK) is a part of Control-flow Enforcement Technology
    (CET) which is a feature aimed at defending against ROP attacks by
    verifying that 'call' and 'ret' instructions are correctly matched.
    
    For well-written code this works transparently without any code changes,
    as return addresses popped from the shadow stack should match return
    addresses popped from the normal stack for performance reasons anyway.

commit 6fc4480cf0b3a23bb82e4a22f3f29496afc2aec2
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:49 2024 +0100

    x86inc.asm: Add the crc32 SSE4.2 GPR instruction

commit 87476b4c4d50b1f2ee5457ab8aac386e485969c6
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:43 2024 +0100

    x86inc: Add a cpu flag for the Ice Lake AVX-512 subset

commit a6b561792f42e96f3c11fc77f808895d32c8f5b6
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:41 2024 +0100

    x86inc: Add CLMUL cpu flag
    
    Also make the GFNI cpu flag imply the presence of both AESNI and CLMUL.

commit 5207a74e777465fe144a736a27286ac63b375fd9
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:39 2024 +0100

    x86inc: Add template defines for EVEX broadcasts
    
    Broadcasting a memory operand is a binary flag, you either broadcast
    or you don't, and there's only a single possible element size for
    any given instruction.
    
    The instruction syntax however requires the broadcast semanticts
    to be explicitly defined, which is an issue when using macros to
    template code for multiple register widths.
    
    Add some helper defines to alleviate the issue.

commit 436be41fc17fcc77b011c43450e4881b9f708b72
Author: Henrik Gramner <henrik@gramner.com>
Date:   Mon Feb 19 23:49:36 2024 +0100

    x86inc: Properly sort instructions in alphabetical order

[Douglas R. Reno]

x265

commit 1cb70f6b44247a069163ab79c213620bfc3b1bf6 (HEAD -> master, origin/master, origin/HEAD)
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Mon Jul 29 16:57:25 2024 +0530

    Fix segmentation fault in linux

commit c478b52e9804972fcb0bd3018b74ed65c247579c
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 26 21:16:22 2024 +0530

    Add compile-time flag for scc

commit 7d307afa7ffbdecfe03bd602557e9100b157c911
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Thu Jul 25 22:24:28 2024 +0530

    Fix build warnings and Code cleanup

commit 3c049e2d50b223f568c42b4b5d0d73b023df8543
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Thu Jul 25 16:49:08 2024 +0530

    Fix run to run variation issue

commit d526356c1d6f17125c14479c0e41dba7386a90d3
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 19 16:52:58 2024 +0530

    Added sao, deblock and temporal-mvp support and disable weight prediction

commit 10646110e49a4a4bc570e00b4dac56770f281401
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 19 10:49:35 2024 +0530

    Added functions for IntaBlockCopy method in SCC

commit c08a2d7e02cb526c1bd496b2b97fd5ddd33b20df
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Thu Jul 18 21:15:11 2024 +0530

    Modify reference picture list for IntrablockCopy mode

commit 4206703bfc5107e969a39926d767c949f04a5d55
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Thu Jul 18 20:37:58 2024 +0530

    Add profiletier, sps, pps MainScc profile support for scc extension

commit 2c48da1ee8133aa3af25512a57441d1be0f404c8
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Thu Jul 18 15:30:03 2024 +0530

    Add cli for intrablockcopy to enable scc extension using IBC method

commit 7afb5179dd9324c9af18deefc96c781cf0710c1f
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Mon Jul 15 23:11:51 2024 +0530

    Decouple mv-hevc code from alpha and latest-tip

commit 4d9d48973b7bb79c66f8374ba6176c3f9de1bdc0
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Tue Jul 30 15:29:14 2024 +0530

    Add support for parsing spatial video with side-by-side and top-bottom format

commit c1fa919b7c4bab5f9ec1f2e7b524edd568d57015
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 12 17:03:03 2024 +0530

    Add mv constraint

commit 191343ae06545f01ceca6ab9bf45c0287b7e3ebd
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 12 17:38:41 2024 +0530

    Add MV sei's

commit 8f126b239c61c8657f266710d167f153ca3fbe41
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 12 16:28:14 2024 +0530

    Fix hash mismatch and temporal mvp issue

commit 40466cfeb4ddb4a3e1580249362ff96f5911ede7
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Fri Jul 12 16:03:28 2024 +0530

    This commit does the following things:
    
    1.Extend the encoding and reconstruction support for multiview
    2.Add support for reference picture set construction

commit 1442eb32fe9e09680c9b1a8cd6d4a01a61172038
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Fri Jul 12 17:45:05 2024 +0530

    Add support for MV-HEVC in DPB and Sub DPB

commit e34825582542d52b16f6d72825576c99d748c23c
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Thu Jul 11 16:22:15 2024 +0530

    Add support for MV-HEVC in HLS

commit 3a031c4f75269fcbfb4634beabb5a03cc8133a51
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Wed Jul 10 17:10:21 2024 +0530

    Add support to parse Multiview input file

commit 4b453cfbdf2fa325d8c3129ae517af43a36df7cd
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Wed Jul 10 16:06:01 2024 +0530

    Add compile time configuration and support for parsing multiview config file

commit 3524c32d40fd827d22ce8a89a1a0cddc366d2487
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 5 14:39:54 2024 +0530

    Fix inconsistent issue

commit f1f67b61d6d953434e3dba266fa73dbb45300680
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Wed Jul 3 10:22:44 2024 +0530

    Add logs for both layers & fix issue while aborting in check params

commit e50f5da22ad1881283221b98148000a915a8ea03
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Wed Jul 3 10:07:03 2024 +0530

    Add support for alpha in HLS

commit c69c113960834400545bc4bce2830ff51dcb86b3
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Fri Jul 5 15:28:10 2024 +0530

    Add support for reconstructed file corresponding to Alpha layer.
    
    This commit also does :
    1.Receive and proccess frames of all layers corresponding to same POC from the Frame encoder thread.

commit 3d808f14db2ea026604ee88bc5012c842de61d0e
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Mon May 6 18:36:56 2024 +0530

    This commit does the following
    
    1.Modify the method of pushing/accessing scalable layer frames to/from DPB
    2.Access current frame from DPB based on scalable layer Id

commit e43153bc3961bd0d9d29cd6ce5b9f14640921332
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Mon May 6 13:58:25 2024 +0530

    Add support to access DPB based on scalable layerID

commit e94ed0cf88dd80dc0f5c88088c1d2e8ede37a244
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Tue Jul 2 15:03:03 2024 +0530

    Add encoding support for enhancement layer

commit 1fcf5ddbaec1fc813b69a62e54ee0faf2c0e9b75
Author: Kirithika <kirithika@multicorewareinc.com>
Date:   Tue Jul 2 14:57:16 2024 +0530

    Add compile time conditions to enable Alpha Encode

commit b8f61996d4287d2ce47b5247025d0038dbdcfb68
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Tue Jul 2 14:47:32 2024 +0530

    Add support for parsing YUVA input

commit c8c9d22075b26aa279b4d634c61889ca3d49656e
Author: AnusuyaKumarasamy <anusuya.kumarasamy@multicorewareinc.com>
Date:   Fri Jul 5 16:11:02 2024 +0530

    Add support for Alpha channel CLI

commit dd594f59d95198c6d8e4133b6002c18e47e7d6fe
Author: Zhengzhi Duan <zhengzhi.duan@shopee.com>
Date:   Tue Jul 23 15:42:32 2024 +0800

    fix lowpass dct for high bit depth

commit 0dfbe6dee33263d2bc8a12a06b7e3925f276560d
Author: Pavan Tarun <pavan.tarun@multicorewareinc.com>
Date:   Tue Jul 2 14:31:39 2024 +0530

    Updated mcstf filter to use two reference frames for fast presets

commit ad1a30a8a69d5bbc0096da7aafc9da21c599cb01
Author: Hari Limaye <hari.limaye@arm.com>
Date:   Thu Apr 11 10:56:23 2024 +0100

    AArch64: Add SVE saoCuStats primitives
    
    Add optimised implementations of saoCuStats primitives using SVE
    instructions for both low and high bitdepth.
    
    Results of speedtests, compared to the existing C and Neon code, when
    compiled with LLVM 17 on a Neoverse V1 machine (higher is better):
    
    Low bitdepth:
    
                     | C -> SVE | Neon -> SVE |
        saoCuStatsE0 |    2.97x |       1.12x |
        saoCuStatsE1 |    3.46x |       1.15x |
        saoCuStatsE2 |    3.49x |       1.21x |
        saoCuStatsE3 |    3.72x |       1.14x |
    
    High bitdepth:
    
                     | C -> SVE | Neon -> SVE |
        saoCuStatsE0 |    2.84x |       1.19x |
        saoCuStatsE1 |    3.47x |       1.28x |
        saoCuStatsE2 |    3.01x |       1.19x |
        saoCuStatsE3 |    3.44x |       1.12x |

commit 5cb01aa293686c9ce0991825d977d7064123f7a1
Author: Hari Limaye <hari.limaye@arm.com>
Date:   Tue Apr 23 14:44:39 2024 +0100

    AArch64: Add check for arm_neon_sve_bridge.h
    
    In order to enable future additions of SVE/SVE2 intrinsics code, add a
    test to the CMake configuration to check for the availability of the
    arm_neon_sve_bridge.h header.
    
    To simplify this check, and tests for AArch64 architecture features in
    general, set all CPU_HAS_<FEAT> flag(s) that are available for a
    particular architecture feature, including when cross compiling. Also
    clean up some unnecessary comments.

commit f29dc45d49f7fcc9f8f9b3328911f26c4cc07565
Author: Hari Limaye <hari.limaye@arm.com>
Date:   Thu Apr 4 15:06:22 2024 +0100

    AArch64: Add Neon saoCuStats primitives for high bitdepth
    
    Add Neon optimised implementations of saoCuStats primitives for high
    bitdepth, as none currently exist.
    
    Results of speedtests, compared to the existing C code, when compiled
    with LLVM 17 (higher is better):
    
    Neoverse V1:
        saoCuStatsBO |  1.09x
        saoCuStatsE0 |  2.39x
        saoCuStatsE1 |  2.67x
        saoCuStatsE2 |  2.47x
        saoCuStatsE3 |  2.86x

[Douglas R. Reno]

x264 done at e6b9cb37a4dad90484d492d56441cd2c44a2680b

x265 done at 99c3e42536c493c9dd0a58d86ff14e3e8bfd1445